The Korea Semiconductor Engineers Association (KSEA) has released projections for the development of silicon chips over the next 15 years in its 2026 Semiconductor Technology Roadmap. Samsung just recently launched the world’s first 2nm GAA chip, the Exynos 2600. Looking ahead, semiconductor circuit technology is expected to reach the 0.2nm node by 2040, ushering in the angstrom-level era. Nevertheless, substantial progress is still required over the next decade and more, as numerous obstacles and challenges lie ahead on the path to manufacturing sub-1nm wafers.
The roadmap is designed to "help enhance the long-term competitiveness of semiconductor technologies, promote academic research, and formulate human resource development strategies". Released by KSEA, this roadmap covers nine core technology areas: semiconductor devices and processes, artificial intelligence (AI) semiconductors, optical connectivity semiconductors, wireless connectivity semiconductor sensors, wired connectivity semiconductors, Processing-in-Memory (PIM), advanced packaging, and quantum computing.
Currently, Samsung’s 2nm GAA technology represents the industry’s most advanced process node. However, reports indicate that Samsung plans to roll out enhanced versions of this manufacturing process. For instance, the company has finalized the basic design of its second-generation 2nm GAA node, and aims to launch its third-generation 2nm GAA technology, SF2P+, within two years. It is estimated that by 2040, the 0.2nm process will adopt a next-generation transistor architecture—the Complementary Field-Effect Transistor (CFET)—alongside monolithic 3D chip design.
As a leader in South Korea’s next-generation semiconductor manufacturing, Samsung has assembled a dedicated team to kick off R&D on 1nm chips, with the goal of achieving mass production by 2029. These technological advancements will be applied not only to mobile SoCs but also to DRAM, where storage circuits will shrink from 11nm to 6nm. High Bandwidth Memory (HBM) is also reportedly set to evolve from 12 layers with 2TB/s bandwidth to 30 layers with 128TB/s bandwidth.
In terms of NAND flash memory, SK hynix has already developed 321-layer QLC technology, and advancements in semiconductor technology will enable QLC NAND flash to reach the 2,000-layer milestone. For AI processors, current chips have achieved a computing capacity of 10 TOPS. The roadmap predicts that in 15 years, training chips will be capable of 1,000 TOPS, while inference chips will hit 100 TOPS.
(Reprinted from https://news.eccn.com/）