According to Reuters, three Intel executives involved in foundry operations are set to retire, and this personnel change is expected to have a significant impact on Intel's foundry business.
The report identifies the three executives as Kaizad Mistry and Ryan Russell, corporate vice presidents of Intel's Technology Development Group (TDG), and Gary Patton, corporate vice president of Intel's Design Technology Platform and a former IBM executive.
Kaizad Mistry and Ryan Russell have long been involved in the research and development of Intel's process technologies and are responsible for multiple core functions within TDG, including overseeing ongoing development tasks and formulating technical development strategies.
Gary Patton's responsibilities include providing comprehensive design platform solutions for foundry customers, covering process design kit (PDK) development, EDA tool support and verification, IP library establishment, and design specification formulation. His core goal is to ensure that customers' designs can be smoothly adapted to Intel's processes, meet performance and power consumption requirements, and achieve mass production with high yields. Before joining Intel, Patton worked at GlobalFoundries for 5 years and IBM for 20 years.
Sources revealed that Intel is also reviewing the structure of its Technology Development Group, which is responsible for formulating manufacturing processes. It is reported that Intel plans to downsize its capacity planning team and lay off some engineering personnel.
Foreign media outlet Tom's Hardware stated that Ann Kelleher, executive vice president of Intel's Technology Development, will also retire in late 2025, concluding a career at Intel spanning over 30 years. This wave of senior management changes is closely linked to the restructuring of Intel's Technology Development Group initiated earlier this year.
Regarding Naga Chandrasekaran, a veteran of Micron's process technology whom Intel recruited earlier, he took over the role of global chief operating officer during the tenure of former Intel CEO Pat Gelsinger. In March this year, Chandrasekaran's responsibilities were further expanded to include technology development and manufacturing operations, and he immediately launched a team restructuring, making relevant personnel adjustments in line with the company's global layoff plan.
According to reports, after his promotion, Chandrasekaran integrated research and development with mass production, aiming to improve yields, shorten process ramp-up timelines, and enhance process consistency. Another executive, Navid Shahriari, was also promoted to executive vice president (EVP), overseeing backend manufacturing operations, including packaging, testing, and advanced packaging strategies, and advancing the layout of chiplet integration and testing technologies.
This series of senior executive departures comes against the backdrop of Intel's promotion of a large-scale cost-cutting plan. Intel CEO Pat Gelsinger also stated in a recently released open letter that the goal is to reduce the global workforce to 75,000 by the end of this year, which would mean approximately a 20% layoff compared to the second quarter of this year.
Since Intel's 18A process failed to secure major customers, it will subsequently be mainly used by Intel itself to demonstrate its advanced process capabilities. Gelsinger stated that the Intel 18A process can only generate reasonable returns when used in internal products. Meanwhile, Intel will also develop Intel 14A from scratch as a foundry node and is currently working closely with major external customers. "Looking ahead, our investment in Intel 14A will be based on confirmed customer commitments." In addition, Gelsinger plans to revitalize Intel's x86 ecosystem and refine Intel's artificial intelligence strategy.
(Reprinted from China Grid https://news.eccn.com)